Data security method and device for computer modules

Abstract

A security method for an attached computer module in a computer system. The security method reads a security identification number in an attached computer module and compares it to a security identification number in a console, which houses the attached computer module. Based upon a relationship between these numbers, a security status is selected. The security status determines the security level of operating the computer system.

Description

FIG. 9 depicts a peripheral console configuration.

temper

The reserved data packet types can be used to support non-PCI bus transactions, e.g., USB transactions. The bits sent in the first nibble of each data packet indicate the type of the data packet. FIG. 24 is a table showing different types of first nibbles and their corresponding data packet types.

Although the functionality above has been generally described in terms of a specific sequence of steps, other steps can also be used. Here, the steps can be implemented in a combination of hardware, firmware, and software. Either of these can be further combined or even separated. Depending upon the embodiment, the functionality can be implemented in a number of different ways without departing from the spirit and scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives.

While the above is a full description of the specific embodiments, various modifications, alternative constructions and equivalents may be used. Therefore, the above description and illustrations should not be taken as limiting the scope of the present invention which is defined by the appended claims.

Claims

1. A security protection method for a computer module, said method comprising:

inserting the computer module into a console;

initiating a security program in said module to read a security identification of said console and to read a security identification of said computer module;

determining of a predetermined security status based upon a relationship of said console identification and said computer module identification;

selecting said predetermined security status; and

operating said computer module based upon said security status.

2. The method of claim 1 wherein said predetermined security status disables a network access to the computer module.

3. The method of claim 1 wherein said predetermined security status disables a secondary storage of information from said computer module to substantially prevent information to be transferred from a memory of the computer module to said secondary storage.

4. The method of claim 1 wherein said security program is provided in a system BIOS.

5. The method of claim 1 wherein said step of initiating reads said security identification of said computer module from a flash memory device.

6. The method of claim 1 wherein said step of initiating reads said security identification of said console from a flash memory device.

7. The method of claim 1 wherein said console is selected from a desktop home computing device, an office desktop computing device, a mobile computing device, a television sot-top computing device, and a co-worker's computing device.

8. A system for secured information transactions, the system comprising:

a console comprising a peripheral controller housed in the console;

a user identification input device coupled to the peripheral controller, the user identification input device being provided for user identification data; and

an attached computer module coupled to the console, the attached computer module comprising a security memory device stored with the user identification data.

9. The system of claim 8 wherein the user identification input device is a finger print reader.

10. The system of claim 8 wherein the user identification input device is a voice processing device.

11. A method for operating a module computer into one of a plurality of network systems, the method comprising:

providing a computer module, the module comprising a connection program;

inserting the computer module into a computer console, the computer console having access to a network;

receiving connection information from the computer console;

configuring the connection program to adapt to the connection information; and

establish a connection between the computer module and a server coupled to the network.

12. The method of claim 11 wherein the connection information comprises a connection protocol for providing the connection.

13. The method of claim 12 wherein the connection protocol is selected from TCP/IP, or mobile IP.

14. A method of improving performance of a computer, comprising:

obtaining an integrated central processing unit (CPU) with a graphics controller in a single chip;

connecting a differential signal channel directly to the integrated CPU and graphics controller to output video data;

conveying Transition Minimized differential Signaling (TDMS) signals through the differential signal channel;

connecting memory directly to the integrated CPU and graphics controller;

providing a connector for the computer for connection to a console; and

providing a first low voltage differential signal (lvds) channel to couple to the connector, the first lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions.

15. The method of claim 14 further comprises conveying Universal Serial Bus (USB) protocol information over the first lvds channel.

16. The method of claim 14 further comprises conveying encoded address and data bits of a peripheral component Interconnect (PCI) bus transaction in serial form over the first lvds channel.

17. The method of claim 14 further comprises of connecting a second lvds channel directly to the integrated CPU and graphics controller, the second lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions.

18. A method of improving performance of a computer, comprising:

obtaining an integrated central processing unit (CPU) with a graphics controller in a single chip;

connecting a differential signal channel directly to the integrated CPU and graphics controller to output video data;

providing a connector for the computer for connection to a console;

providing a first low voltage differential signal (lvds) channel to couple to the connector, the first lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions; and

conveying Universal Serial Bus (USB) protocol information through the first lvds channel.

19. The method of claim 18 further comprising connecting a second lvds channel directly to the integrated CPU and graphics controller, the second lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions.

20. The method of claim 19 further comprising conveying Universal Serial Bus (USB) protocol information over the second lvds channel.

21. The method of claim 18 further comprising conveying Transition Minimized differential Signaling (TDMS) signals through the differential signal channel.

22. A method of improving performance of a computer, comprising:

obtaining an integrated central processing unit (CPU) with a graphics controller in a single chip;

connecting a first low voltage differential signal (lvds) channel directly to the integrated CPU and graphics controller, wherein the first lvds channel comprises two unidirectional, serial bit channels that transmit data in opposite directions;

conveying Universal Serial Bus (USB) protocol information through the first lvds channel;

providing a connector for the computer for connection to an external peripheral; and

providing a second lvds channel to couple to the connector, the second lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions.

23. The method of claim 22 further comprising conveying Universal Serial Bus (USB) protocol information over the second lvds channel.

24. The method of claim 22 further comprising conveying encoded address and data bits of a peripheral component Interconnect (PCI) bus transaction in serial form over the second lvds channel.

25. The method of claim 22 further comprising receiving power from the connector upon connection to an external peripheral power supply.

26. A method of improving performance of a computer, comprising:

obtainin an integrated central processing unit (CPU) with a graphics controller in a single chip;

connecting a low voltage differential signal (lvds) channel directly to the integrated CPU and graphics controller, wherein the lvds channel comprises two unidirectional, serial bit channels that transmit data in opposite directions;

conveying Universal Serial Bus (USB) protocol information through the lvds channel;

connecting a differential signal channel directly to the integrated CPU and graphics controller to output video data; and

connecting memory directly to the integrated CPU and graphics controller.

27. The method of claim 26 further comprising conveying Transition Minimized differential Signaling (TDMS) signals through the differential signal channel.

28. The method of claim 26 further comprising providing a connector for the computer for connection to a console with a power supply.

29. The method of claim 26 further comprising

providing a connector for the computer for connection to a console, and

coupling Universal Serial Bus (USB) protocol information from the lvds channel to the console.

30. A method of improving performance of a computer, comprising:

obtaining an integrated central processing unit (CPU) with a graphics controller in a single chip;

connecting a low voltage differential signal (lvds) channel directly to the integrated CPU and graphics controller, wherein the lvds channel comprises two unidirectional, serial bit channels that transmit data in opposite directions;

conveying serially encoded address and data of a peripheral component Interconnect (PCI) bus transaction through the lvds channel;

connecting a differential signal channel directly to the integrated CPU and graphics controller to output video data; and

connecting memory directly to the integrated CPU and graphics controller.

31. The method of claim 30 further comprising

providing a connector for the computer for connection to a console, and

providing a second lvds channel that couples to the connector, the second lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions.

32. The method of claim 31 further comprising conveying serially encoded address and data of a peripheral component Interconnect (PCI) bus transaction to the console through the second lvds channel and the connector.

33. The method of claim 32 further comprising conveying video data to the console through the connector.

34. The method of claim 31 further comprising conveying Universal Serial Bus (USB) protocol information to the console through the second lvds channel and the connector.

35. A method of improving performance of a computer, comprising:

obtaining an integrated central processing unit (CPU) and graphics controller in a single chip;

connecting a first low voltage differential signal (lvds) channel directly to the integrated CPU and graphics controller, wherein the lvds channel comprises two unidirectional, serial bit channels that transmit data in opposite directions;

connecting a differential signal channel directly to the integrated CPU and graphics controller to output video data;

providing a connector for the computer for connection to an external peripheral; and

providing a second lvds channel to couple to the connector, the second lvds channel comprising two unidirectional, serial bit channels that transmit data in opposite directions.

36. The method of claim 35 further comprising conveying Universal Serial Bus (USB) protocol information to the external peripheral through the second lvds channel and the connector.

37. The method of claim 35 further comprising conveying Universal Serial Bus (USB) protocol information through the first lvds channel.

38. The method of claim 35 further comprising conveying Transition Minimized differential Signaling (TDMS) signals through the differential signal channel.