A security method for an attached computer module in a computer system. The security method reads a security identification number in an attached computer module and compares it to a security identification number in a console, which houses the attached computer module. Based upon a relationship between these numbers, a security status is selected. The security status determines the security level of operating the computer system.
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0. 56. A system comprising:
a console housing a network controller and a low voltage differential signal serial channel for communicating encoded address and data bits of peripheral Component Interconnect (PCI) bus transaction;
a user identification input device coupled to the console; and
an attached computer module coupled to the console, the attached computer module comprising
a device stored with a user identification data,
a security program providing protection for access to the computer module based on the user identification data, and
an interface controller coupled to the console for communicating data in a serial bit stream,
wherein the low voltage differential signal serial channel further comprises two sets of unidirectional serial bit channels which transmit data in opposite directions.
0. 44. A system for secured information transactions, the system comprising:
a computer console comprising
a network communication controller housed in the console,
a low voltage differential signal (LVDS) channel comprising two sets of multiple unidirectional serial channels that transmit encoded address and data bits of peripheral Component Interconnect (PCI) bus transaction in opposite directions, and
a user identification input device coupled to the console, the user identification input device being provided for user identification data; and
an attached computer module that inserts into the console in a “plug and play” operation, the attached computer module comprising
a security program providing password protection for data content within said attached computer module,
a security memory device stored with the user identification data, and
an interface controller coupled to the console through serial bit based lines;
wherein the interface controller transfers data between the computer module and the console in Universal Serial Bus (USB) protocol.
0. 29. A system of connecting a computer module to a network, the system comprising:
a console having access to a network;
a computer module inserted into the console and powered by the console, the computer module comprising
a central processing unit,
a peripheral bridge coupled to the central processing unit without any intervening peripheral Component Interconnect (PCI) bus, the peripheral bridge comprising an interface controller to communicate an encoded serial bit stream of address and data bits of PCI bus transaction,
a low voltage differential signal channel extending from the interface controller to convey the encoded serial bit stream of PCI bus transaction, and
a connection program receiving connection information from the console, configuring the connection program to adapt to the connection information, and establishing a connection between the computer module and a server coupled to the network,
wherein the low voltage differential signal channel comprises two sets of unidirectional serial bit channels which transmit data in opposite directions.
0. 60. A system for secured information transactions, the system comprising:
a console comprising a peripheral controller housed in the console;
a user identification input device coupled to the peripheral controller, the user identification input device being provided for user identification data; and
an attached computer module coupled to the console, the attached computer module comprising
a security memory device stored with the user identification data,
a central processing unit,
an integrated interface controller and bridge unit to communicate an encoded serial stream of address and data bits of peripheral Component Interconnect (PCI) bus transaction as 10 bit packets, the integrated interface controller and bridge unit directly coupled to the central processing unit, and
a low voltage differential signal channel coupled to the integrated interface controller and bridge unit to convey the encoded serial stream of PCI bus transaction, the low voltage differential signal channel comprising two sets of unidirectional serial bit channels which transmit data in opposite directions.
0. 24. A method comprising:
providing a computer module, the module comprising
a central processing unit,
a connection program,
an integrated interface controller and bridge unit to output an encoded serial bit stream of address and data bits of peripheral Component Interconnect (PCI) bus transaction, the integrated interface controller and bridge unit coupled to the central processing unit without any intervening PCI bus, and
a low voltage differential signal channel coupled to the integrated interface controller and bridge unit to convey the encoded serial bit stream of PCI bus transaction;
inserting the computer module into a computer console, the computer console having access to a network;
receiving connection information from the computer console;
configuring the connection program to adapt to the connection information; and
establishing a connection between the computer module and a server coupled to the network,
wherein the low voltage differential signal channel further comprises two sets of unidirectional serial bit channels which transmit data in opposite directions.
0. 36. A system for secured information transactions, the system comprising:
a console comprising a network communication controller housed in the console;
a user identification input device coupled to the console, the user identification input device being provided for user identification data; and
an attached computer module coupled to the console, the attached computer module comprising
a central processing unit,
a security program,
a peripheral bridge directly coupled to the central processing unit, the peripheral bridge comprising an interface controller, the peripheral bridge and the interface controller configured as a single integrated unit, and
a low voltage differential signal channel that comprises two sets of unidirectional serial bit channels in opposite directions which transmit data in 10 bit packets, the low voltage differential signal channel coupled to the interface controller;
wherein said security program receives the user identification data from the console, determines a predetermined security status, and operating said computer module based upon said security status.
0. 14. A system for secured information transactions, the system comprising:
a console comprising a network controller housed in the console;
a user identification input device coupled to the network controller; and
an attached computer module coupled to the console, the attached computer module comprising
a central processing unit,
a device stored with a user identification data,
a security program providing password protection for access to the computer module based on the user identification data,
an integrated interface controller and bridge unit to communicate an encoded serial bit stream of address and data bits of peripheral Component Interconnect (PCI) bus transaction, the integrated interface controller and bridge unit directly coupled to the central processing unit, and
a low voltage differential signal channel coupled to the integrated interface controller and bridge unit to convey the encoded serial bit stream of PCI bus transaction,
wherein the low voltage differential signal channel comprises two sets of unidirectional serial bit channels which transmit data in opposite directions.
0. 50. A system for secured information transactions, the system comprising:
a console comprising a network communication controller housed in the console;
a user input device coupled to the console, the user input device being provided for user identification data; and
an attached computer module inserted into the console, the attached computer module comprising
a central processing unit,
a peripheral bridge directly coupled to the central processing unit without any intervening peripheral Component Interconnect (PCI) bus, the peripheral bridge comprising an integrated interface controller to communicate an encoded serial bit stream of address and data bits of PCI bus transaction,
a low voltage differential signal channel extending from the integrated interface controller to convey the encoded serial bit stream of PCI bus transaction, and
a mass storage unit storing a security program and user identification data;
wherein the security program receives the user identification data from the input device, matches the stored user identification data and permits external access to the computer module,
wherein the low voltage differential signal channel comprises two sets of unidirectional serial bit channels which transmit data in opposite directions, and each of the unidirectional serial bit channels corresponds to a point-to-point link.
0. 1. A security protection method for a computer module, said method comprising:
inserting the computer module into a console;
initiating a security program in said module to read a security identification of said console and to read a security identification of said computer module;
determining of a predetermined security status based upon a relationship of said console identification and said computer module identification;
selecting said predetermined security status; and
operating said computer module based upon said security status.
0. 2. The method of
0. 3. The method of
0. 4. The method of
0. 5. The method of
0. 6. The method of
0. 7. The method of
0. 8. A system for secured information transactions, the system comprising:
a console comprising a peripheral controller housed in the console;
a user identification input device coupled to the peripheral controller, the user identification input device being provided for user identification data; and
an attached computer module coupled to the console, the attached computer module comprising a security memory device stored with the user identification data.
0. 9. The system of
0. 10. The system of
0. 11. A method for operating a module computer into one of a plurality of network systems, the method comprising:
providing a computer module, the module comprising a connection program;
inserting the computer module into a computer console, the computer console having access to a network;
receiving connection information from the computer console;
configuring the connection program to adapt to the connection information; and
establish a connection between the computer module and a server coupled to the network.
0. 12. The method of
0. 13. The method of
0. 15. The system of claim 14 wherein the encoded serial bit stream comprises 10 bit packets.
0. 16. The system of claim 14 wherein the integrated interface controller and bridge unit is coupled to the central processing unit without any intervening PCI bus.
0. 17. The system of claim 16 wherein the integrated interface controller and bridge unit comprises a north bridge and an interface controller integrated with the north bridge, and the low voltage differential signal channel extends from the interface controller to convey the encoded serial bit stream of PCI bus transaction.
0. 18. The system of claim 16 further comprising a peripheral component coupled to the central processing unit through the low voltage differential signal channel.
0. 19. The system of claim 16 wherein the attached computer module further comprises a main memory coupled to the central processing unit through the integrated interface controller and bridge unit.
0. 20. The system of claim 16 wherein the integrated interface controller and bridge unit is configured to output encoded PCI address and data bits in serial form that are conveyed over the low voltage differential signal channel.
0. 21. The system of claim 16 wherein the encoded serial bit stream of PCI bus transaction comprises information to permit decoding to create a PCI bus transaction across the low voltage differential signal channel.
0. 22. The system of claim 16 wherein the low voltage differential signal channel comprises a first plurality of unidirectional, differential signal pairs to convey data in a first direction and a second plurality of unidirectional, differential signal pairs to convey data in a second, opposite direction.
0. 23. The system of claim 16 wherein the network controller comprises an Ethernet controller.
0. 25. The method of claim 24 wherein the connection between the computer module and the server comprises an Ethernet connection.
0. 26. The method of claim 24 wherein the connection protocol is TCP/IP.
0. 27. The method of claim 24 further comprising conveying, over the low voltage differential signal channel, the encoded serial bit stream of PCI bus transaction as 10 bit packets.
0. 28. The method of claim 27 wherein conveying the encoded serial bit stream of PCI bus transaction comprises conveying information to permit decoding to create a PCI bus transaction across the low voltage differential signal channel.
0. 30. The system of claim 29 wherein the encoded serial bit stream comprises 10 bit packets.
0. 31. The system of claim 29 wherein the interface controller is integrated with the peripheral bridge as a single integrated unit.
0. 32. The system of claim 31 wherein the peripheral bridge comprises a north bridge.
0. 33. The system of claim 32 further comprising a south bridge coupled to the north bridge through the low voltage differential signal channel.
0. 34. The system of claim 31 wherein the interface controller is coupled to the central processing unit without any intervening PCI bus.
0. 35. The system of claim 31 wherein each of the unidirectional serial bit channels corresponds to a point-to-point link.
0. 37. The system of claim 36 wherein the data packets comprise an encoded bit stream of address and data bits of peripheral Component Interconnect (PCI) bus transaction.
0. 38. The system of claim 37 wherein the interface controller is configured to transmit and receive encoded PCI address and data bits over the low voltage differential signal channel.
0. 39. The system of claim 38 wherein the interface controller is coupled to the central processing unit without any intervening PCI bus.
0. 40. The system of claim 38 wherein the peripheral bridge comprises a north bridge.
0. 41. The system of claim 40 further comprising a south bridge coupled to the north bridge.
0. 42. The system of claim 41 wherein the south bridge is coupled to the north bridge through the low voltage differential signal channel.
0. 43. The system of claim 38 wherein the low voltage differential signal channel comprises two sets of unidirectional, multiple serial bit channels to convey data in opposite directions, and each of the unidirectional, multiple serial bit channels corresponds to a point-to-point link.
0. 45. The system of claim 44 wherein said attached computer module inserts into the console and is powered by the console to form a functional computer.
0. 46. The system of claim 44 wherein the attached computer module has a tamper resistant enclosure.
0. 47. The system of claim 44 wherein the security memory device comprises of flash memory.
0. 48. The system of claim 44 wherein the console further comprises an integrated interface controller and bridge unit to transmit and receive encoded serial bits of PCI bus transaction over the LVDS channel.
0. 49. The system of claim 48 wherein the encoded serial bits of PCI bus transaction comprise information to permit decoding to create a PCI bus transaction.
0. 51. The system of claim 50 wherein the security program further determines a predetermined security status, and controls different levels of access privilege to said attached computer module.
0. 52. The system of claim 50 wherein the encoded serial bit stream comprises 10 bit packets.
0. 53. The system of claim 50 wherein the peripheral bridge comprises a north bridge.
0. 54. The system of claim 50 wherein the integrated interface controller is coupled to the central processing unit without any intervening PCI bus, and the integrated interface controller is configured to output encoded address and data bits of PCI bus transaction in serial form that are conveyed over the low voltage differential signal channel.
0. 55. The system of claim 50 wherein the low voltage differential signal channel comprises a first plurality of unidirectional, differential signal pairs to convey data in a first direction and a second plurality of unidirectional, differential signal pairs to convey data in a second, opposite direction.
0. 57. The system of claim 56 wherein the encoded address and data bits of PCI bus transaction comprise 10 bit data packets.
0. 58. The system of claim 56 wherein the computer module further comprises a flash memory mass storage device.
0. 59. The system of claim 56 wherein the serial bit stream transmits data packets in Universal Serial Bus (USB) protocol.
0. 61. The system of claim 60 wherein the integrated interface controller and bridge unit is coupled to the central processing unit without any intervening PCI bus.
0. 62. The system of claim 61 wherein the integrated interface controller and bridge unit comprises a north bridge and an interface controller integrated with the north bridge, and the low voltage differential signal channel extends from the interface controller to convey the encoded serial stream of PCI bus transaction.
0. 63. The system of claim 61 wherein the attached computer module further comprises a main memory coupled to the central processing unit through the integrated interface controller and bridge unit.
0. 64. The system of claim 61 wherein the integrated interface controller and bridge unit is configured to output encoded PCI address and data bits in serial form that are conveyed over the low voltage differential signal channel.
0. 65. The system of claim 61 wherein the encoded serial stream of PCI bus transaction comprises information to permit decoding to create a PCI bus transaction across the low voltage differential signal channel.
0. 66. The system of claim 61 wherein the low voltage differential signal channel comprises a first plurality of unidirectional, differential signal pairs to convey data in a first direction and a second plurality of unidirectional, differential signal pairs to convey data in a second, opposite direction.
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FIG. 9 is a block diagram of one embodiment of a computer system using the interface of the present invention. temper
As suggested above, there are also differences between HIC 600 and PIC 1200. Some of the differences between HIC 600 and PIC 1100 include the following. First, receiver 1240 in PIC 1200, unlike receiver 640 in HIC 600, does not contain a synchronization unit. As mentioned above, the synchronization unit in HIC 600 synchronizes the PCKR clock to the PCK clock locally generated by PLL 650. PIC 1100 does not locally generate a PCK clock and therefore, it does not have a locally generated PCK clock with which to synchronize the PCK clock signal that it receives from HIC 600. Another difference between PIC 1200 and HIC 600 is the fact that PIC 1200 contains a video parallel to serial converter 1289 whereas HIC 600 contains a video serial to parallel converter 680. Video parallel to serial converter 1289 receives 16 bit parallel video capture data and video control signals on the Video Port Data [0::15] and Video Port Control lines, respectively, from the video capture circuit (not shown in FIG. 12) and converts them to a serial video data stream that is transmitted on the VPD line to the HIC. The video capture circuit may be any type of video capture circuit that outputs a 16 bit parallel video capture data and video control signals. Another difference lies in the fact that PIC 1200, unlike HIC 600, contains a clock doubler 1282 to double the video clock rate of the video clock signal that it receives. The doubled video clock rate is fed into video parallel to serial converter 1282 through buffer 1283 and is sent to serial to parallel converter 680 through buffer 1284. Additionally, reset control unit 1235 in PIC 1200 receives a reset signal from the CPU CNTL & GPIO latch/driver unit 1190 and transmits the reset signal on the RESET# line to the HIC 600 whereas reset control unit 645 of HIC 600 receives the reset signal and forwards it to its CPU CNTL & GPIO latch/driver unit 690 because, in the above embodiment, the reset signal RESET# is unidirectionally sent from the PIC 1200 to the HIC 600.
The XPBus which includes lines PCK, PD0 to PD3, PCN, PCKR, PDR0 to PDR3, and PCNR, has two sets of unidirectional lines transmitting clock signals and bits in opposite directions. The first set of unidirectional lines includes PCK, PD0 to PD3, and PCN. The second set of unidirectional lines includes PCKR, PDR0 to PDR3, and PCNR. Each of these unidirectional set of lines is a point-to-point bus with a fixed transmitter and receiver, or in other words a fixed master and slave bus. For the first set of unidirectional lines, the HIC is a fixed transmitter/master whereas the PIC is a fixed receiver/slave. For the second set of unidirectional lines, the PIC is a fixed transmitter/master whereas the HIC is a fixed receiver/slave. The LVDS lines of XPBus, a cable friendly and remote system I/O bus, transmit fixed length data packets within a clock cycle.
In the embodiment shown in FIG. 9, HIC 919 is coupled to an integrated unit 921 that includes a CPU, a cache and a north bridge. In another embodiment, such as that shown in FIG. 13, the CPU 1305 and north bridge 1310 are separate rather than integrated units. In yet another embodiment, such as that shown in FIG. 14, the HIC and PIC are integrated with the north and south bridges, respectively, such that integrated HIC and north bridge unit 1405 includes an HIC and a north bridge, while integrated PIC and south bridge unit 1410 includes a PIC and a south bridge.
Although the functionality above has been generally described in terms of a specific sequence of steps, other steps can also be used. Here, the steps can be implemented in a combination of hardware, firmware, and software. Either of these can be further combined or even separated. Depending upon the embodiment, the functionality can be implemented in a number of different ways without departing from the spirit and scope of the claims herein. One of ordinary skill in the art would recognize other variations, modifications, and alternatives.
While the above is a full description of the specific embodiments, various modifications, alternative constructions and equivalents may be used. Therefore, the above description and illustrations should not be taken as limiting the scope of the present invention which is defined by the appended claims.
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