Patent
   D427088
Priority
Jul 09 1999
Filed
Nov 29 1999
Issued
Jun 27 2000
Expiry
Jun 27 2014
Assg.orig
Entity
unknown
5
7
n/a
The ornamental design for a wafer level burn-in tester, as shown and described.

FIG. 1 is a perspective view of the top, front and right side of a wafer level burn-in tester showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a right side view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom view thereof; and,

FIG. 6 is a rear view thereof.

Asai, Yoshihiko, Ezawa, Yoshikazu

Patent Priority Assignee Title
D989144, May 14 2021 HITACHI HIGH-TECH CORPORATION Apparatus for evaluating semiconductor substrate
D989830, May 14 2021 HITACHI HIGH-TECH CORPORATION Semiconductor substrate transfer apparatus
D989831, May 14 2021 HITACHI HIGH-TECH CORPORATION Apparatus for evaluating semiconductor substrate
ER7490,
ER8606,
Patent Priority Assignee Title
5851143, May 10 1996 Thermal Industries Disk drive test chamber
5929651, Aug 09 1995 International Business Machines Corporation Semiconductor wafer test and burn-in
D333144, Oct 03 1990 Canon Kabushiki Kaisha Chamber for semiconductor fabricating machine
D352911, Nov 27 1992 Hitachi, Ltd. Processing machine for electron beam lithography system
D365584, Dec 15 1993 Tokyo Electron Kabushiki Kaisha Semiconductor manufacturing device
JP1009499,
JP991054,
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Nov 17 1999ASAI, YOSHIHIKOMATSUSHITA ELECTRIC INDUSTRIAL CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0104090480 pdf
Nov 17 1999EZAWA, YOSHIKAZUMATSUSHITA ELECTRIC INDUSTRIAL CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0104090480 pdf
Nov 29 1999Matsushita Electric Industrial Co., Ltd.(assignment on the face of the patent)
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