Semiconductor wafer with dicing positions for solar cell fabrication

Abstract

Description

FIG. 1 is a top perspective view of a semiconductor wafer with dicing positions for a solar cell fabrication showing our new design;

FIG. 2 is a front side elevation view thereof;

FIG. 3 is a rear side elevation view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom plan view thereof;

FIG. 6 is a left side elevation view thereof; and,

FIG. 7 is a right side elevation view thereof.

Claims

The ornamental design for a semiconductor wafer with dicing positions for solar cell fabrication, as shown and described.