Patent
   D655256
Priority
Aug 17 2010
Filed
Nov 19 2010
Issued
Mar 06 2012
Expiry
Mar 06 2026
Assg.orig
Entity
unknown
20
23
n/a
The ornamental design for a semiconductor substrate, as shown and described.

FIG. 1 is a front, right, and top perspective view of a semiconductor substrate showing our new design;

FIG. 2 is a front view thereof, a rear view being a mirror image thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a bottom plan view thereof;

FIG. 5 is a right-side view thereof, a left side view being a mirror image thereof;

FIG. 6 is a partially enlarged view at 6 shown in FIG. 2 thereof;

FIG. 7 is a partially enlarged view at 7 shown in FIG. 2 thereof;

FIG. 8 is an enlarged cross sectional view at 8-8 shown in FIG. 3 thereof; and,

FIG. 9 is a partially enlarged sectional view at 9 shown in FIG. 8 thereof.

The broken line showing of the semiconductor substrate is for the purpose of illustrating environmental structure and forms no part of the claimed design.

Sasaki, Makoto, Nishiguchi, Taro, Harada, Shin, Fujiwara, Shinsuke, Namikawa, Yasuo

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Executed onAssignorAssigneeConveyanceFrameReelDoc
Oct 18 2010NISHIGUCHI, TAROSUMITOMO ELECTRIC INDUSTRIES, LTDASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0254090915 pdf
Oct 18 2010SASAKI, MAKOTOSUMITOMO ELECTRIC INDUSTRIES, LTDASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0254090915 pdf
Oct 18 2010FUJIWARA, SHINSUKESUMITOMO ELECTRIC INDUSTRIES, LTDASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0254090915 pdf
Oct 19 2010HARADA, SHINSUMITOMO ELECTRIC INDUSTRIES, LTDASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0254090915 pdf
Oct 25 2010NAMIKAWA, YASUOSUMITOMO ELECTRIC INDUSTRIES, LTDASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0254090915 pdf
Nov 19 2010Sumitomo Electric Industries, Ltd.(assignment on the face of the patent)
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