FIG. 1 is a front, top, right perspective view of a semiconductor device showing my new design;
FIG. 2 is a front, bottom, right perspective view thereof; and
FIG. 3 is a rear, bottom, left perspective view thereof;
FIG. 4 is a front elevational view thereof.
FIG. 5 is a rear elevational view thereof;
FIG. 6 is a right side elevation view thereof, a left side elevational view being a mirror image;
FIG. 7 is a top plan view thereof; and,
FIG. 8 is a bottom plan view thereof.
The broken lines showing of the unclaimed portions of the semiconductor device form no part of the claimed design.
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