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Patent
D877707
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Priority
Mar 30 2017
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Filed
Aug 16 2017
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Issued
Mar 10 2020
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Expiry
Mar 10 2035
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Assg.orig
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Entity
unknown
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4
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21
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n/a
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The ornamental design for a semiconductor package, as shown and described.
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FIG. 1 is a front, top and left side perspective view of a semiconductor package showing our new design;
FIG. 2 is a front view thereof;
FIG. 3 is a rear view thereof;
FIG. 4 is a top view thereof;
FIG. 5 is a bottom view thereof;
FIG. 6 is a left side view thereof; the right side view being a mirror image thereof;
FIG. 7 is a cross sectional view taken along line 7-7 of FIG. 2, with the internal system omitted; and,
FIG. 8 is another perspective view thereof, showing the state in use.
The parts shown in even dashed broken lines do not form part of the claimed design.
Akeboshi, Yoshihiro, Yamagishi, Keitaro, Itakura, Hiroshi
Patent |
Priority |
Assignee |
Title |
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Mar 29 2002 |
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Kabushiki Kaisha Toshiba |
Semiconductor device |
D623546, |
Jun 23 2009 |
Panasonic Electric Works Co., Ltd.; PANASONIC ELECTRIC WORKS CO , LTD |
Detecting sensor |
D623547, |
Jun 23 2009 |
Panasonic Electric Works Co., Ltd.; PANASONIC ELECTRIC WORKS CO , LTD |
Detecting sensor |
D623548, |
Jun 23 2009 |
Panasonic Electric Works Co., Ltd.; PANASONIC ELECTRIC WORKS CO , LTD |
Detecting sensor |
Date |
Maintenance Fee Events |
n/a
Date |
Maintenance Schedule |
n/a