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Patent
   D403002
Priority
Jan 27 1998
Filed
Jan 27 1998
Issued
Dec 22 1998
Expiry
Dec 22 2012
Inventors
Gonzalez, …
Assg.orig
Semiconduc…
Assg.curr
Semiconduc…
Entity
unknown
Referenced by
20
References
1
Maint.:
n/a
The ornamental design for a shield and cover for target of sputter coating apparatus, as shown and described.

FIG. 1 is a perspective view of a shield and cover for target of sputter coating apparatus embodying the design of the invention;

FIG. 2 is a top plan view of the shield and cover for target of sputter coating apparatus of FIG. 1;

FIG. 3 is a bottom plan view of the shield and cover for target of sputter coating apparatus of FIG. 1;

FIG. 4 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the bottom of FIG. 2;

FIG. 5 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the top of FIG. 2;

FIG. 6 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the left side of FIG. 2;

FIG. 7 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the right side of FIG. 2;

FIG. 8 is a cross-sectional view of the shield and cover for target of sputter coating apparatus taken along the line 8--8 of FIG. 2; and,

FIG. 9 is a cross-sectional view of the shield and cover for target of sputter coating apparatus taken along the line 9--9 of FIG. 2.
INVENTORS:

Gonzalez, Jose Luis, Jordan, David Bruce, Tudhope, Andrew William

THIS PATENT IS REFERENCED BY THESE PATENTS:
Patent Priority Assignee Title
7349223, Nov 27 2001 ADVANTEST SINGAPORE PTE LTD Enhanced compliant probe card systems having improved planarity
7382142, Nov 27 2001 ADVANTEST SINGAPORE PTE LTD High density interconnect system having rapid fabrication cycle
7403029, May 27 1999 ADVANTEST SINGAPORE PTE LTD Massively parallel interface for electronic circuit
7579848, Nov 27 2001 ADVANTEST SINGAPORE PTE LTD High density interconnect system for IC packages and interconnect assemblies
7621761, Jun 20 2000 ADVANTEST SINGAPORE PTE LTD Systems for testing and packaging integrated circuits
7772860, May 27 1999 Advantest Corporation Massively parallel interface for electronic circuit
7872482, May 23 2000 ADVANTEST SINGAPORE PTE LTD High density interconnect system having rapid fabrication cycle
7884634, May 27 1999 ADVANTEST SINGAPORE PTE LTD High density interconnect system having rapid fabrication cycle
7952373, Sep 27 2004 ADVANTEST SINGAPORE PTE LTD Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
D658691, Mar 30 2011 Tokyo Electron Limited Liner for plasma processing apparatus
D658692, Mar 30 2011 Tokyo Electron Limited Liner for plasma processing apparatus
D658693, Mar 30 2011 Tokyo Electron Limited Liner for plasma processing apparatus
D703160, Jan 27 2011 HITACHI HIGH-TECH CORPORATION Grounded electrode for a plasma processing apparatus
D904066, Sep 19 2019 GPCP IP HOLDINGS LLC Core plug
D933725, Feb 08 2019 Applied Materials, Inc Deposition ring for a substrate processing chamber
D933726, Jul 31 2020 Applied Materials, Inc Deposition ring for a semiconductor processing chamber
D934315, Mar 20 2020 Applied Materials, Inc Deposition ring for a substrate processing chamber
D941371, Mar 20 2020 Applied Materials, Inc Process shield for a substrate processing chamber
D941372, Mar 20 2020 Applied Materials, Inc Process shield for a substrate processing chamber
D942516, Feb 08 2019 Applied Materials, Inc Process shield for a substrate processing chamber
THIS PATENT REFERENCES THESE PATENTS:
Patent Priority Assignee Title
5690795, Jun 05 1995 Applied Materials, Inc Screwless shield assembly for vacuum processing chambers
ASSIGNMENT RECORDS    Assignment records on the USPTO
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Jan 26 1998TUDHOPE, ANDREW WILLIAMSemiconductor Equipment Technology, IncASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0089170907 pdf
Jan 26 1998JORDAN, DAVID BRUCESemiconductor Equipment Technology, IncASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0089170907 pdf
Jan 26 1998GONZALEZ, JOSE LUISSemiconductor Equipment Technology, IncASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0089170907 pdf
Jan 27 1998Semiconductor Equipment Technology, Inc.(assignment on the face of the patent)
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