Top contact layout board in an electrical system

The ornamental design for a top contact layout board in an electrical system, as shown and described.

FIG. 1 is a front view of a top contact layout board in an electrical system.

FIG. 2 is a side view taken from the left of FIG. 1.

FIG. 3 is a side view taken from the right of FIG. 1.

FIG. 4 is a side view taken from the top of FIG. 1.

FIG. 5 is a side view taken from the bottom of FIG. 1; and,

FIG. 6 is a rear view taken from the opposite of the front view shown in FIG. 1.

The broken lines shown in FIGS. 1 and 6 views are for illustrative purposes only and form no part of the claimed design.

Patent	Priority	Assignee	Title
D654033,	Jan 20 2010	CELADON SYSTEMS, INC	Grooved wire support for a probe test core
D654883,	Oct 21 2010	Tokyo Electron Limited	Top plate for reactor for manufacturing semiconductor
D654884,	Oct 21 2010	Tokyo Electron Limited	Top plate for reactor for manufacturing semiconductor
D655257,	Oct 21 2010	Tokyo Electron Limited	Top plate for reactor for manufacturing semiconductor
D655259,	Oct 21 2010	Tokyo Electron Limited	Top plate for reactor for manufacturing semiconductor
D691974,	Dec 22 2011	Tokyo Electron Limited	Holding pad for transferring a wafer
D693319,	Dec 22 2011	Tokyo Electron Limited	Holding pad for transferring a wafer
D694790,	Sep 20 2011	Tokyo Electron Limited	Baffle plate for manufacturing semiconductor
D697038,	Sep 20 2011	Tokyo Electron Limited	Baffle plate
D703161,	Oct 15 2012	Sumitomo Electric Industries, Ltd.	Wafer holder for ion implantation
D703162,	Oct 17 2012	Sumitomo Electric Industries, Ltd.	Wafer holder for stepper
D713363,	Dec 31 2013	CELADON SYSTEMS, INC	Support for a probe test core
D722031,	Dec 31 2013	CELADON SYSTEMS, INC	Top contact layout board in an electrical system
D913256,	Jul 31 2019		Antenna pattern for a semiconductive substrate carrier
D926716,	Jul 31 2019		Antenna pattern for a semiconductive substrate carrier

Patent	Priority	Assignee	Title
3795845,
4495377,	Dec 30 1982	International Business Machines Corporation	Substrate wiring patterns for connecting to integrated-circuit chips
5091822,	Jun 15 1989	Graphico Co., Ltd.	Radial type of parallel system bus structure with printed, twisted conductor lines
5210682,	Oct 19 1990	Graphico Co., Ltd.	Radial type of parallel system bus structure having pairs of conductor lines with impedance matching elements
5491364,	Aug 31 1994	Delphi Technologies, Inc	Reduced stress terminal pattern for integrated circuit devices and packages
6160716,	Sep 08 1997	Rambus Inc	Motherboard having one-between trace connections for connectors
6310398,	Dec 03 1998	Walter M., Katz	Routable high-density interfaces for integrated circuit devices
6556454,	Oct 31 2000	III Holdings 1, LLC	High density contact arrangement
6664620,	Jun 29 1999	Intel Corporation	Integrated circuit die and/or package having a variable pitch contact array for maximization of number of signal lines per routing layer
6793500,	Sep 18 2003	International Business Machines Corporation	Radial contact pad footprint and wiring for electrical components
7808110,	Feb 01 2007	Siliconware Precision Industries Co., Ltd.	Semiconductor package substrate
20020060318,
225434,
D320361,	Jun 02 1989	Tokyo Electron Limited	Wafer probe plate holder
D552048,	Oct 26 2005	Hon Hai Precision Industry Co., Ltd.	Printed circuit board

////

Executed on	Assignor	Assignee	Conveyance	Frame	Reel	Doc
Aug 16 2010		Celadon Systems, Inc.	(assignment on the face of the patent)
Oct 06 2010	ROOT, BRYAN J	CELADON SYSTEMS, INC	ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS	025111	0973	pdf
Oct 06 2010	FUNK, WILLIAM A	CELADON SYSTEMS, INC	ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS	025111	0973	pdf
Nov 25 2015	CELADON SYSTEMS, INC	CELADON SYSTEMS, INC	CHANGE OF ADDRESS	041912	0980	pdf

n/a

Date	Maintenance Fee Events

n/a

Date	Maintenance Schedule