Patent
   D521464
Priority
Nov 04 2003
Filed
Apr 29 2004
Issued
May 23 2006
Expiry
May 23 2020
Assg.orig
Entity
unknown
15
8
n/a
The ornamental design for a process tube for semiconductor device manufacturing apparatus, as shown and described.

FIG. 1 is an isometric view of a process tube for semiconductor device manufacturing apparatus of the present invention;

FIG. 2 is a front view thereof;

FIG. 3 is a left side view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a top view thereof;

FIG. 6 is a bottom view thereof;

FIG. 7 is a sectional view along line 7—7 shown in FIG. 5;

FIG. 8 is a sectional view along line 8—8 shown in FIG. 7;

FIG. 9 is a sectional view along line 9—9 shown in FIG. 5;

FIG. 10 is a sectional view along line 10—10 shown in FIG. 5; and,

FIG. 11 is a sectional view along line 11—11 shown in FIG. 5.

A rear view is not shown as the rear view is a mirror image of the front view shown in FIG. 2.

Ishii, Katsutoshi, Matsuura, Hiroyuki

Patent Priority Assignee Title
D586768, Oct 12 2006 Tokyo Electron Limited Process tube for manufacturing semiconductor wafers
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D901406, Mar 20 2019 KOKUSAI ELECTRIC CORPORATION Inner tube of reactor for semiconductor fabrication
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Patent Priority Assignee Title
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5279986, Feb 03 1989 Applied Materials, Inc. Method for epitaxial deposition
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6402849, Mar 17 2000 Samsung Electronics Co., Ltd. Process tube having slit type process gas injection portion and hole type waste gas exhaust portion, and apparatus for fabricating semiconductor device
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Apr 29 2004Tokyo Electron Limited(assignment on the face of the patent)
Jun 11 2004MATSUURA, HIROYUKITokyo Electron LimitedASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0155250546 pdf
Jun 14 2004ISHII, KATSUTOSHITokyo Electron LimitedASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0155250546 pdf
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