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The ornamental design for a process tube for semiconductor device manufacturing apparatus, as shown and described.
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FIG. 1 is an isometric view of a process tube for semiconductor device manufacturing apparatus of the present invention;
FIG. 2 is a front view thereof;
FIG. 3 is a left side view thereof;
FIG. 4 is a right side view thereof;
FIG. 5 is a top view thereof;
FIG. 6 is a bottom view thereof;
FIG. 7 is a sectional view along line 7—7 shown in FIG. 5;
FIG. 8 is a sectional view along line 8—8 shown in FIG. 7;
FIG. 9 is a sectional view along line 9—9 shown in FIG. 5;
FIG. 10 is a sectional view along line 10—10 shown in FIG. 5; and,
FIG. 11 is a sectional view along line 11—11 shown in FIG. 5.
A rear view is not shown as the rear view is a mirror image of the front view shown in FIG. 2.
Ishii, Katsutoshi, Matsuura, Hiroyuki
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Apr 29 2004 | Tokyo Electron Limited | (assignment on the face of the patent) | / | |||
Jun 11 2004 | MATSUURA, HIROYUKI | Tokyo Electron Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015525 | /0546 | |
Jun 14 2004 | ISHII, KATSUTOSHI | Tokyo Electron Limited | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 015525 | /0546 |
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