Patent
   D586768
Priority
Oct 12 2006
Filed
Apr 11 2007
Issued
Feb 17 2009
Expiry
Feb 17 2023
Assg.orig
Entity
unknown
33
10
n/a
The ornamental design for a process tube for manufacturing semiconductor wafers, as shown and described.

FIG. 1 is a front view of the design for a process tube for manufacturing semiconductor wafers in accordance with the invention;

FIG. 2 is a rear view thereof;

FIG. 3 is a right side view thereof;

FIG. 4 is a left side view thereof;

FIG. 5 is a top view thereof;

FIG. 6 is a bottom view thereof;

FIG. 7 is a sectional view thereof along line 77 of FIG. 5;

FIG. 8 is a sectional view thereof along line 88 of FIG. 5;

FIG. 9 is a sectional view thereof along line 99 of FIG. 1; and,

FIG. 10 is a front, perspective view thereof.

In the preferred embodiment, the entire body of the process tube is transparent such that the inside of the tube can be seen. Dash lines show the boundary of the claimed design.

The broken lines define portions of the process tube that form no part of the claimed design.

Inoue, Hisashi, Endo, Atsushi

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Patent Priority Assignee Title
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Executed onAssignorAssigneeConveyanceFrameReelDoc
Apr 11 2007Tokyo Electron Limited(assignment on the face of the patent)
Jun 19 2007INOUE, HISASHITokyo Electron LimitedASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0197940313 pdf
Jul 27 2007ENDO, ATSUSHITokyo Electron LimitedASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0197940313 pdf
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