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Patent
D731990
Priority
Apr 18 2012
Filed
Oct 17 2012
Issued
Jun 16 2015
Expiry
Jun 16 2029
Assg.orig
Entity
unknown
3
34
n/a
The ornamental design for an integrated circuit tag , as shown and described.
FIG. 1 is a perspective view of an integrated circuit tag showing our new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a right side elevational view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a top plan view thereof;
FIG. 6 is a bottom plan view thereof; and,
FIG. 7 is a cross sectional view thereof taken along the line 7 -7 of FIG. 2 .
The broken lines shown in the drawings represent portions of the integrated circuit tag that form no part of the claimed design. Dashed-dot-dashed broken lines define the boundaries of, but not included in, the claimed design.
Nakano, Tomoko , Fujisawa, Naohiro , Miyajima, Keiichi , Minoshima, Kenji
Patent
Priority
Assignee
Title
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Date
Maintenance Fee Events
n/a
Date
Maintenance Schedule
n/a