Transportable semiconductor wafer rack

Abstract

Description

FIG. 1 is a perspective view of a transportable semiconductor wafer rack showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a first side view thereof;

FIG. 5 is a second side view thereof;

FIG. 6 is a top view thereof;

FIG. 7 is a bottom view thereof;

FIG. 8 is a cross-section view taken along line 8-8 of FIG. 7; and,

FIG. 9 is another cross-section view taken along line 9-9 of FIG. 7.

The broken lines in the Figures are for the purpose of illustrating unclaimed portions of the transportable semiconductor wafer rack and form no part of the claimed design. The shade lines in the Figures show contour and not surface ornamentation.

Claims

The ornamental design for a transportable semiconductor wafer rack, as shown and described.