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The ornamental design for an integrated circuit device, as shown. |
FIG. 1 is a perspective view of the top, front and left side of an integrated circuit device showing our new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a bottom plan view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a right side elevational view thereof;
FIG. 6 is a front elevational view thereof; and,
FIG. 7 is a rear elevational view thereof.
Kajiwara, Satomi, Enomoto, Yoshinari
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Feb 10 1997 | ENOMOTO, YOSHINARI | FUJI ELECTRIC CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 008496 | /0900 | |
Feb 10 1997 | KAJIWARA, SATOMI | FUJI ELECTRIC CO , LTD | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 008496 | /0900 | |
Mar 03 1997 | Fuji Electric Co., Ltd. | (assignment on the face of the patent) | / | |||
Apr 01 2011 | FUJI ELECTRIC SYSTEMS CO , LTD FES | FUJI ELECTRIC CO , LTD | MERGER AND CHANGE OF NAME | 026970 | /0872 | |
Apr 01 2011 | FUJI TECHNOSURVEY CO , LTD MERGER BY ABSORPTION | FUJI ELECTRIC CO , LTD | MERGER AND CHANGE OF NAME | 026970 | /0872 |
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