Power semiconductor package

Abstract

Description

FIG. 1 is a top perspective view of a power semiconductor package showing my new design;

FIG. 2 is a bottom perspective view thereof;

FIG. 3 is a top view thereof;

FIG. 4 is a bottom view thereof;

FIG. 5 is a front view thereof;

FIG. 6 is a rear view thereof;

FIG. 7 is a side view thereof; and,

FIG. 8 is an opposite side view thereof.

The broken lines shown in the drawings depict portions of the power semiconductor package that form no part of the claimed design.

Claims

The ornamental design for a power semiconductor package, as shown and described.