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The ornamental design for a semiconductor device, as shown. |
FIG. 1 is a perspective view of the top, front and left side of a semiconductor device showing our new design;
FIG. 2 is a perspective view of the bottom, rear and right side thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a top plan view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a rear elevational view thereof; and,
FIG. 8 is a bottom plan view thereof.
Nakayama, Masao, Tara, Katsuji, Muramatsu, Kaoru
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Executed on | Assignor | Assignee | Conveyance | Frame | Reel | Doc |
Apr 01 1997 | NAKAYAMA, MASAO | Matsushita Electronics Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 008529 | /0060 | |
Apr 01 1997 | MURAMATSU, KAORU | Matsushita Electronics Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 008529 | /0060 | |
Apr 01 1997 | TARA, KATSUJI | Matsushita Electronics Corporation | ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS | 008529 | /0060 | |
Apr 16 1997 | Matsushita Electronics Corporation | (assignment on the face of the patent) | / | |||
Apr 04 2001 | Matsushita Electronics Corporation | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | MERGER SEE DOCUMENT FOR DETAILS | 021994 | /0678 | |
Oct 01 2008 | MATSUSHITA ELECTRIC INDUSTRIAL CO , LTD | Panasonic Corporation | CHANGE OF NAME SEE DOCUMENT FOR DETAILS | 021994 | /0755 |
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