FIG. 1 is a front, top and right side perspective view of a semiconductor device showing our new design;
FIG. 2 is a rear, top, and left side perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof;
FIG. 9 is a front, top and right side perspective view thereof, shown in a used condition attached to a mount shown in broken lines; and,
FIG. 10 is another front elevational view thereof, attached to a mount shown in broken lines.
The broken lines shown in the drawings represent portions of the semiconductor device that form no part of the claimed design.
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