Patent
   D810706
Priority
Dec 24 2014
Filed
Oct 12 2016
Issued
Feb 20 2018
Expiry
Feb 20 2033
Assg.orig
Entity
unknown
31
45
n/a
The ornamental design for a semiconductor module, as shown and described.

FIG. 1 is a front view of a semiconductor module showing our new design;

FIG. 2 is a rear view thereof;

FIG. 3 is a left side view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a top view thereof;

FIG. 6 is a bottom view thereof;

FIG. 7 is a front, right, and bottom perspective view thereof;

FIG. 8 is a rear, left and top perspective view thereof; and,

FIG. 9 is a cross sectional view taken along line 9-9 of FIG. 1.

The ornamental design of the present disclosure is a semiconductor module on which power semiconductor elements and the like may be mounted. Plate shaped terminals are provided on the left side and right side. A plurality of post shaped pins extend from a rear surface. The cross-sections of the post shaped pins are rhombic. A hole penetrates from a front surface to the rear surface at each of four corners of the semiconductor module.

Soyano, Shin, Maruyama, Ryo, Yamada, Toru, Takamiya, Yoshikazu

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Apr 20 2015SOYANO, SHINFUJI ELECTRIC CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0400050804 pdf
Apr 20 2015TAKAMIYA, YOSHIKAZUFUJI ELECTRIC CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0400050804 pdf
Apr 20 2015YAMADA, TORUFUJI ELECTRIC CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0400050804 pdf
Apr 20 2015MARUYAMA, RYOFUJI ELECTRIC CO , LTD ASSIGNMENT OF ASSIGNORS INTEREST SEE DOCUMENT FOR DETAILS 0400050804 pdf
Oct 12 2016FUJI ELECTRIC CO., LTD(assignment on the face of the patent)
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